1. Field of the Invention
The present invention relates to substrate processing, and more particularly to apparatus and methods for processing substrates and/or wafers in real-time using Direct Current (DC) and Radio Frequency (RF) Hybrid processing tools and associated Direct Current/Radio Frequency Hybrid (DC/RFH) recipes and/or models.
2. Description of the Related Art
Etch process behavior is inherently non-linear and interactive from step-to-step (layers) or as process stacks are compiled (etch/cvd/implant). With the knowledge of the process interactions based on physical modeling of Tokyo Electron Limited (TEL) chambers, base processes, imperial data, and measurements from process refinement and tuning the control of Critical Dimension (CD), Sidewall Angle (SWA), depths, film thicknesses, over etching, undercuts, surface cleaning and damage control can be recursively calculated and optimized using multi-input multi-output non-linear models. Current low cost products use a bulk silicon technology. As the transistor continues to shrink in size, the impact of the channel depth is becoming critical (ultra-shallow source/drain extensions). As the Silicon on Insulator (SOI) film shrinks, smaller variations in the gate and/or spacer thickness and thickness of the SOI film can affect the transistor's performance. When etch procedures are not controlled, the removal of the material near the gate affects the electrical performance.
Current high performance microprocessors use PD SOI (partially depleted Silicon-on-Insulator film—giving a threshold voltage of 0.2 volts). PD SOI films are around 50 nm thick while the gate and/or spacer reduction amount can be a large percentage (10%) of the total gate and/or spacer thickness. The future generation of SOI films is named FD SOI (fully depleted giving a threshold voltage 0.08 volts and a thickness of ˜25 nm). Currently theses films are not in production due to limitations in thickness control uniformity and defects. Channel mobility degrades with decreasing SOI thickness. With thinner films, the control of the metal-gate structures becomes more critical.